Publications

Book Chapter

> 2021

  1. A. R. Trivedi, J. Kung, J. H. Ko, “Architectures for self-powered edge-intelligence” in Handbook of Computer Architecture, Springer.

Journal

> 2022

  1. J. Lee, J. Park, S. Lee, J. Kung, “Implication of optimizing NPU dataflows on neural architecture search for mobile devices,” ACM Transactions on Design Automation of Electronic Systems (TODAES), January 2022.

> 2021

  1. S. Park, J.-J. Kim, J. Kung, “AutoRelax: HW-SW co-optimization for efficient spGEMM operations with automated relaxation in deep learning,” IEEE Transactions on Emerging Topics in Computing (TETC), Early Access, June 2021.
  2. N. Park, S. Ryu, J. Kung, J.-J. Kim, “High-throughput near-memory processing on CNNs with 3D HBM-like memory,” ACM Transactions on Design Automation of Electronic Systems (TODAES), June 2021.
  3. Y. Jang, S. Kim, D. Kim, S. Lee, J. Kung, “Deep partitioned training from near-storage computing to DNN accelerators,” IEEE Computer Architecture Letters (CAL), May 2021 (lightning talk: link).
  4. G. Park, J. Kung, Y. Lee, “Design and analysis of approximate compressors for balanced error accumulation in MAC operator,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), April 2021.

> 2020

  1. J. Jo, J. Kung, and Y. Lee, “Approximate LSTM computing for energy-efficient speech recognition,” MDPI Electronics, November 2020.
  2. M. Jang, S. Lee, J. Kung, D. Kim, “Defending against flush+reload attack with DRAM cache by bypassing shared SRAM cache,” IEEE Access, September 2020.

> 2019

  1. M. Kim, J. Kung, S. Lee, “Towards scalable analytics with inference-enabled solid-state drives,” IEEE Computer Architecture Letters (CAL), July 2019.
  2. J. Park, W. Yi, D. Ahn, J. Kung, J.-J. Kim, “Balancing computation loads and optimizing input vector loading in LSTM accelerators,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), July 2019.

> 2015-2018

  1. J. Kung, D. Kim, S. Mukhopadhyay, “Adaptive precision cellular nonlinear network,” IEEE Transcations on Very Large Scale Integration Systems (TVLSI), Feb. 2018.
  2. J. Kung, D. Zhang, G. van der Wal, S. Chai, S. Mukhopadhyay, “Efficient object detection using embedded binarized neural networks,” Journal of Signal Processing Systems (JSPS): Special Issue on Embedded Computer Vision, June 2017.
  3. D. Kim, J. Kung, S. Mukhopadhyay, “A power-aware digital multilayer perceptron accelerator with on-chip training based on approximate computing,” IEEE Transactions on Emerging Topics in Computing (TETC), May 2017.
  4. J. Kung, D. Kim, S. Mukhopadhyay, “On the impact of energy-accuracy tradeoff in a digital cellular neural network for image processing,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), July 2015.
  5. J. Kung, W. Yueh, S. Yalamanchili, S. Mukhopadhyay, “Post-silicon estimation of spatiotemporal temperature variations using MIMO thermal filters,” IEEE Transactions on Components, Packaging and Manufacturing Technology (TCPMT), May 2015.

Conference

> 2022

  1. S. Jung, J. Lee, H. Noh, J.-H. Yoon, J. Kung, “DualPIM: a dual-precision and low-power CNN inference engine using SRAM- and eDRAM-based processing-in-memory arrays,” IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), June 2022.

> 2021

  1. M. Bodenham, J. Kung, “On the extensive exploration of transformer-based language models for memory and latency bounded edge devices,” Workshop on ROAD4NN at IEEE/ACM Design Automation Conference (DAC), December 2021.
  2. D. Park, S. Im, K.-W. Kwon, J. Kung, “ZeBRA: precisely destroying neural networks with zero-data based repeated bit flip attack,” British Machine Vision Conference (BMVC), November 2021.
  3. S. Hwang, J. Lee, J. Kung, “Adaptive input-to-neuron interlink development in training of spike-based liquid state machines,” IEEE International Symposium on Circuits and Systems (ISCAS), May 2021.

> 2019

  1. S. Jung, J. Kung, “Noise tolerance of an energy-scalable deep learning model with two extreme bit-precisions,” IEEE International SoC Design Conference (ISOCC), October 2019. (Cadence Award Winner)
  2. J. Joe, J. Kung, S. Lee, Y. Lee, “Similarity-based LSTM architecture for energy-efficient edge-level speech recognition,” ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2019.
  3. S. Jung, S. Moon, Y. Lee, J. Kung, “MixNet: an energy-scalable and computationally lightweight deep learning accelerator,” ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2019.
  4. J. Kung, J. Park, S. Park, J.-J. Kim, “Peregrine: a flexible hardware accelerator for LSTM with limited synaptic connection patterns,” IEEE/ACM Design Automation Conference (DAC), June 2019.

> 2018

  1. S. Mukhopadhyay, M. Wolf, M. F. Amir, E. Gebahrdt, J. H. Ko, J. Kung, B. A. Musassar, “The CAMEL approach to stacked sensor smart cameras” Design, Automation and Test in Europe (DATE), March 2018.
  2. J. Park, J. Kung, W. Yi, J.-J. Kim, “Maximizing system performance by balancing computation loads in LSTM accelerators” Design, Automation and Test in Europe (DATE), March 2018.

> 2017

  1. J. H. Ko, Y. Long, M. F. Amir, D. Kim, J. Kung, T. Na, A. R. Trivedi, S. Mukhopadhyay, “Energy-efficient neural image processing for internet-of-things edge devices” IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), August 2017.
  2. J. Kung, Y. Long, D. Kim, S. Mukhopadhyay, “A programmable hardware accelerator for simulating dynamical systems” IEEE International Symposium on Computer Architecture (ISCA), June 2017. 
  3. T. Na, J. H. Ko, J. Kung, S. Mukhopadhyay, “On-chip training of recurrent neural networks with limited numerical precision” IEEE International Joint Conference on Neural Network (IJCNN), May 2017.
  4. J. Kung, Y. Long, D. Kim, S. Mukhopadhyay, “An energy-efficient physical platform for solving differential equations” 42th Annual Government Microcircuit Applications and Critical Technology Conference (GOMACTech), March 2017.
  5. J. H. Ko, T. Na, D. Kim, J. Kung, S. Mukhopadhyay, “Adaptive weight compression for memory-efficient neural networks” Design, Automation and Test in Europe (DATE), March 2017.

> 2011-2016

  1. J. Kung, D. Kim, S. Mukhopadhyay, “Dynamic approximation with feedback control for energy-efficient recurrent neural network hardware” ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), August 2016.
  2. M. F. Amir, D. Kim, J. Kung, D. Lie, S. Yalamanchili, S. Mukhopadhyay, “NeuroSensor: A 3D image sensor with integrated neural accelerator” IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2016. (Best Student Paper Award)
  3. Y. Long, E. M. Jung, J. Kung, S. Mukhopadhyay, “ReRAM crossbar based recurrent neural network for human activity detection” IEEE International Joint Conference on Neural Network (IJCNN), July 2016.
  4. D. Kim, J. Kung, S. Chai, S. Yalamanchili, S. Mukhopadhyay, “Neurocube: a programmable digital neuromorphic architecture with high-density 3D memory” ACM/IEEE International Symposium on Computer Architecture (ISCA), June 2016.
  5. D. Kim, J. Kung, S. Chai, S. Yalamanchili, S. Mukhopadhyay, “Neurocube: a scalable, efficient platform for neuro-inspired computing” 41st Annual Government Microcircuit Applications and Critical Technology Conference (GOMACTech), March 2016.
  6. J. Kung, D. Kim, S. Mukhopadhyay, “A power-aware digital feedforward neural network platform with backpropagation driven approximate synapses” IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), July 2015.
  7. J. Kung, M. Cho, S. Yalamanchili, S. Mukhopadhyay, “On-line real-time temperature and power estimation of an IC using time-domain thermal Filters” IEEE Electrical Performance of Electronic Packaging and Systems (EPEPS), October 2013.
  8. J. Kung, I. Han, S. S. Sapatnekar, Y. Shin, “Thermal signature: a simple yet accurate thermal index for floorplan optimization” ACM/EDAC/IEEE Design Automation Conference (DAC), June 2011.
  9. J. Kung, Y. Shin, “Compact thermal models: assessment and pitfalls” IEEE International SoC Design Conference (ISOCC), November 2011.
  10. S. Paik, J. Kung, Y. Shin, “Exploring the opportunity of optimizing sequencing elements in ASIC designs” IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), August 2011.